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  mi80 2 intel ? cedar trail + nm10 mini - itx motherboard user?s manual version 1.0 a free datasheet http:///
ii mi8 02 user?s manual acknowledgments ami bios is a trademark of american megatrends inc. ps/2 is a trademark of international business machines corporation. intel and luna- pier are reg istered trademarks of intel corporation. microsoft windows is a registered trademark of microsoft corporation. winbond is a registered trademark of winbond electronics corporation. all other product names or trademarks are properties of their respective ow ners. free datasheet http:///
mi8 02 user?s manual iii table of contents introduction ................................ ...................... 1 checklist ................................ ................................ ............. 2 MI802 specifications ................................ ......................... 3 board dimensions ................................ .............................. 4 installations ................................ ...................... 5 installing the memory ................................ ......................... 6 setting the jumpers ................................ ............................. 7 connectors on MI802 ................................ ....................... 12 bios setup ................................ ....................... 21 drivers installation ................................ ...... 41 intel chipset software installation utility ......................... 42 vga drivers installation ................................ .................. 43 realtek hd audio driver installation .............................. 44 lan drivers installation ................................ .................. 45 appendix ................................ ........................... 47 a. i/o port address map ................................ .................. 47 b. interrupt request lines (irq) ................................ ...... 48 c. watchd og timer configuration ................................ ... 49 d. digital i/o sample code ................................ ............. 53 free datasheet http:///
iv mi8 02 user?s manual this page is intentionally left blank. free datasheet http:///
introduction mi8 02 user?s manual 1 introduction mi80 2 is a mini itx board (170mm x 170mm) that comes with the intel atom d2 550 processor that runs 1.86ghz and has a 1mb l2 cache. the board is based on the intel ? cg82nm10 pch chipset and supports two sodimm for a maximum memory support of 4gb. MI802 features the integrated gma3650 intel graphics controller and supports both cr t and dvd - d video display interface, as well asa 24 - bit dual channel interface with the help of chrontel ch 7 511b device. onboard functional connections are available for two sata ports, six com ports, eight usb 2.0 ports, audio and a ps/2 keyboard/mouse s tack connector. additional expansion comes in one slim pci slot, two mini pci - e(x1) slots. power connections is with a +12~24v dc in (atx 4- pin). remarks: currently, the board comes in two versions: MI802 ? with cedar trail - d / atom d2550 1.86g tdp=10w ddr3 - 1066mhz so - dimm x 2 (w/o ecc), max. 4gb, single channel MI802n ? with cedar trail - m / atom n2600 1.6g tdp=3.5w ddr3 - 800 mhz so - dimm x 1 (w/o ecc), max. 2gb, single channel free datasheet http:///
introduction 2 mi8 02 user?s manual checklist your MI802 package should include the items listed below. ? the mi8 02 mini - itx mother board ? this user?s manual ? 1 cd containing chipset drivers and flash memory utility ? serial ata cable ? i/o shield free datasheet http:///
introduction mi8 02 user?s manual 3 MI802 specifications form factor mini - itx cpu type intel ? atom tm d2550 /n2600 processor (32nm technology) 22mm x 22mm, mi cro - fcbga559 [tdp=10w /3/5w ] cpu speed 1. 8 6ghz / 1mb l2 cache (MI802) 1.6ghz / 1mb l2 cache (MI802n) bios ami bios, support acpi function chipset intel ? cg82nm10 pch : 17mm x 17mm, 360 - pin bga (2.1w) memory ddr 3 - 1066mhz so - dimm x 2 (w / o ecc), m ax . 4gb , single channel (MI802) ddr3 - 800mhz so - dimm x 1 (w / o ecc), m ax . 2 gb , single channel (MI802n) vga intel? integrated graphics controller (gma3 6 50) s upports directx 9 graphic , open gl 3.0 interface: crt and dvi - d (thru level shifter asm1442 ) lvds chrontel ch 7 511 b for 24 - bit dual channel lvds interface lan realtek 8111e - vl gbe x 2 usb nm10 built - in usb 2.0 host controller, s upport 8 ports - 4 ports in the rear panel - 3 ports fo r onboard pin header (3 rd port signal shared with mini pcie) - 2 ports via mini pcie slot serial ata ports nm10 built - in sata controller, supports 2 ports audio nm10 built - in hd a udio controller w/ realtek alc 269qhd codec lpc i/o fintek f81866ad - i : - c om1 (rs - 232 /422/485 ), com2 (rs - 232 ), com3 (rs - 232), com4 (rs - 232) , com5 ( rs - 232), com6 ( rs - 232) - hardware monitor ( 2 thermal inputs, 4 voltage monitor inputs, vid0 ~ 4 & 2 x fan header) - com1/2 with pin - 9 with power for 2 ports (500 ma for each port) digi tal io 4 in & 4 out keyboard/mouse connector yes expansion slots slim pci slot x 1 mini pci - e(x1) x 2, m ounting holes for full - sized (x2) [reserved mounting holes for half - sized also x1 ] edge connector ps/2 kb + ms stack connector x 1 db15 + dvi - d stack connector x 1 for crt + dvi dual db9 stack connector x1 for com #1 + com#2 dual usb + rj45 x 2 for usb + lan hd audio jack 3x1 connector x 1 (line - out, line - in, mic) onboard header/ connector 2x4 pin header x 1 for 2 usb port s 1x5 pin header x 1 for usb 4 [shared with mini pcie usb signal] 2x6 pin header x 1 for front audio df11 type 10 pin box header x 4 for com # 3~6 2x5 pin header x 1 for digital i/o df13 box header x 2 for lvds 4 pin box header x1 for lcd backlight control sata connector x 2 4 - pin hdd power connector x 2 for sata device 4 - pin atx power connector for dc - in power 4 - pin header for speaker out (from alc269 internal amplifier) watchdog timer yes (256 segments, 0, 1, 2?255 sec/min) power connector +12~24v dc - in (atx 4 - pins) others 1. ismart function [auto - scheduler & power fail resume ] 2. eup/erp thru super i/o [wol from 1 st gbe ] board size 170mm x 170 mm free datasheet http:///
introduction 4 mi8 02 user?s manual board dimensions free datasheet http:///
installations mi8 02 user?s manual 5 installations this section provides information on how to use the jumpers and connectors on the mi80 2 in order to set up a workable system. the topics covered are: installing the memory .......................................................................... 6 setting the jumpers .............................................................................. 7 connectors on MI802 ........................................................................ 12 free datasheet http:///
installations 6 mi8 02 user?s manual installing the memory the mi80 2 board supp orts two ddr 3- 1066 memory. the mi80 2n board supports one ddr 3- 800 memory. remarks: d2550 s upports so - dimm x 2 (w / o ecc), m ax . 4gb, single channel n2600 s upports so - dimm x 1 (w / o ecc), m ax . 2 gb, single channel installing and removing memory modules to in stall the ddr3 modules, locate the memory slot on the board and perform the following steps: 1. hold the ddr3 module so that the key of the ddr3 module align ed with th at on the memory slot. 2. gently push the ddr3 module in an upright position until the clips of the slot close to hold the ddr3 module in place when the ddr3 module touches the bottom of the slot. 3. to remove the ddr3 module, press the clips with both hands. ddr3 module lock lock lock lock free datasheet http:///
installations mi8 02 user?s manual 7 setting the jumpers jumpers are used on mi80 2 to select variou s settings and features according to your needs and applications. contact your supplier if you have doubts about the best configuration for your needs. the following lists the connectors on mi80 2 and their respective functions. jumper locations on MI802 ................................................................ 8 jp1: com1 rs232 ri/+5v/+12v power setting ................................. 9 jp2: com2 rs232 ri/+5v/+12v power setting ................................. 9 jp3: lcd panel power selection ......................................................... 9 jp4: lcd backl ight power selection ................................................... 9 jp5: lcd backlight control selection .............................................. 10 jp7: clear cmos setting .................................................................. 10 jp8: lcd backlight control output level ........................................ 10 jp9: lcd boot rom protect (factor y use only) ................................ 10 sw1: panel type selection ................................................................ 10 free datasheet http:///
installations 8 mi8 02 user?s manual jumper locations on mi80 2 jumper locations on mi80 2 ........................................................... page jp1: com1 rs232 ri/+5v/+12v power setting ................................. 9 jp2: com2 rs2 32 ri/+5v/+12v power setting ................................. 9 jp3: lcd panel power selection ......................................................... 9 jp4: lcd backlight power selection ................................................... 9 jp5: lcd backlight control selection .............................................. 10 jp7: clear cmos setting .................................................................. 10 jp8: lcd backlight control output level ....................................... 10 jp9: lcd boot rom protect (factory use only) ................................ 10 sw1: panel type selection ................................................................ 10 free datasheet http:///
installations mi8 02 user?s manual 9 jp1: com1 r s232 ri/+5v/+12v power setting jp 1 setting function pin 1 - 2 short/closed +12v pin 3 - 4 short/closed ri* pin 5 - 6 short/closed +5v jp2: com2 rs232 ri/+5v/+12v power setting jp 2 setting function pin 1 - 2 short/closed +12v pin 3 - 4 short/closed ri* pin 5 - 6 short/closed +5v jp 3 : lcd panel power selection jp 3 lcd panel power +3.3v* +5v jp4: lcd backlight power selecti on jp 4 setting backlight voltage 1 3 2 4 5 6 pin 1 - 2 short/closed +3.3v pin 3 - 4 short/closed +5v pin 5 - 6 short/closed +12v* free datasheet http:///
installations 10 mi8 02 user?s manual jp 5 : lcd backlight control s election jp 5 setting super i/o* r eserved jp7 : clear cmos setting jp7 setting normal* clear cmos jp8: lcd backlight control output level jp 8 setting 2 1 +3.3v* 2 1 +5v jp 9 : lcd boot rom protect (factory use only) jp 9 setting 2 1 write 2 1 normal* *default sw1: panel type selection 1 on 3 2 4 3 2 1 4 7 8 5 6 default: pin 1,2,3,4 off(1111) free datasheet http:///
installations mi8 02 user?s manual 11 sw1 - 4 sw1 - 3 sw1 - 2 sw1 - 1 panel type on on on on 800*600 18bit 1ch on on on off 1024*768 18bit 1ch on on off on 1024*768 24bit 1ch on on off off 1280 *768 18bit 1ch on off on on 1280*800 18bit 1ch on off on off 1280*960 18bit 1ch on off off on 1280*1024 24bit 2ch on off off off 1366*768 18bit 1ch off on on on 1366*768 24bit 1ch off on on off 1440*900 24bit 2ch off on off on 1440*1050 24bit 2ch off on off off 1600*900 24bit 2ch off off on on 1680*1050 24bit 2ch off off on off 1600*1200 24bit 2ch off off off on 1920*1080 24bit 2ch off off off off 1920*1200 24bit 2ch free datasheet http:///
installations 12 mi8 02 user?s manual connectors on mi80 2 the connectors on mi80 2 allows you to connect ex ternal devices such as keyboard, floppy disk drives, hard disk drives, printers, etc. the following table lists the connectors on mi80 2 and their respective functions. connector locations on MI802 ......................................................... 13 cn6: ps/2 keyboard and ps /2 mouse connectors ............................ 14 cn7: com1/rs232/422/485, com2/rs232 serial port ................... 14 cn9: vga and dvi - d connector ..................................................... 15 cn15: gbe 1st rj - 45 and usb0/1 ports ........................................... 15 cn19: gbe 2nd rj - 45 and usb2/3 ports .......................................... 15 cn22: line - in, line - out & microphone connector ............................ 15 cn1, cn2, cn3, cn4: com3/4/5/6 rs232 serial port .................... 16 cn5: atx 4p +1 2v~24v connector ................................................ 16 cn8, cn11: hdd power connector ................................................. 16 cn10, cn12: lvds connectors (1st channel, 2nd channel) .............. 16 cn13: lcd backlight connector ...................................................... 17 cn14, cn16: sata connectors ....................................................... 17 cn17: usb6/7 ports header ............................................................. 17 cn18: ismart jtag pin header (factory use only) ........................ 17 cn20, cn21: mini pcie connector .................................................. 17 cn23: audio connector (df11 connector) ....................................... 18 cn24: speaker connector (jst connector) ...................................... 18 cpu_fan1: cpu fan power connecto r ........................................... 18 dimm1, dimm2: ddr3 so - dim m ................................................ 18 j1: lpc debug connector (factory use only) ..................................... 18 j2: digital i/o .................................................................................... 18 j3: system function connector .......................................................... 19 j5: usb4 port ................................................................................... 19 j6: spi flash connector (factory use only) ......................................... 19 pci1: pci slot (supports 2 master) ................................................... 19 sys_fan1: system fan power connector ....................................... 19 free datasheet http:///
installations mi8 02 user?s manual 13 connector locations on mi80 2 free datasheet http:///
installations 14 mi8 02 user?s manual cn6 : ps/2 keyboard and ps/2 mouse connectors ps/2 mouse ps/2 keyboard signal name keyboard mouse signal name keyboard data 1 7 mouse data n.c. 2 8 n.c. gnd 3 9 gnd + 5v 4 10 + 5v keyboard clock 5 11 mouse clock n.c. 6 12 n.c. cn7: com1/rs232/422/485, com2/rs232 serial port [ pin # signal name rs - 232 r2 - 422 rs - 485 1 dcd tx - data - 2 rx tx+ data+ 3 tx rx+ nc 4 dtr rx - nc 5 ground ground ground 6 dsr nc nc 7 rts nc nc 8 cts nc nc 9 * ri nc nc * pi n 9 supports ri/+5v/+12v function. free datasheet http:///
installations mi8 02 user?s manual 15 cn9: vga and dvi - d connector vga signal name pin # pin # signal name red 1 2 green blue 3 4 n.c. gnd 5 6 gnd gnd 7 8 gnd +5v 9 10 gnd n.c. 11 12 ddc data hsync 13 14 vsync ddc clock 15 [ [ [[ dvi - d signal name pin # pin # signal name data 2 - 1 16 hot plug data 2+ 2 17 data 0 - shield 2 3 18 data 0+ n.c. 4 19 shield 0 n.c. 5 20 n.c. ddc clock 6 21 n.c. ddc data 7 22 shield clk n.c 8 23 clock - data 1 - 9 24 clock+ data 1+ 10 c1 n.c. shield 1 11 c2 n.c. n.c. 12 c3 n.c. n.c. 13 c4 n.c. +5v 14 c5 n.c. ground 15 c6 n.c. cn 15: gbe 1st rj - 45 and usb 0 / 1 ports cn19 : gbe 2nd rj - 45 and usb 2/3 ports cn22: line - in, line - out & micr ophone connector l-in l-out mic free datasheet http:///
installations 16 mi8 02 user?s manual cn1, cn2, cn3, cn4: com3 / 4 / 5 / 6 rs232 serial port 2x5_2.0mm_straight_male_ df11 (haoguo df11 - 10s - pa66h, mating connector: hirose df11 - 10ds - 2c or compatible) 2 1 10 9 signal name pin # pin # signal name dcd, data carrier detect 1 2 rxd, receive data txd, transmit data 3 4 dtr, data terminal ready gnd, ground 5 6 dsr, data set ready rts, request to send 7 8 cts, clear to send ri, ring indicator 9 10 not used cn5: atx 4p +12v ~24v connector [ [ [ [ signal name pin # pin # signal name gnd 1 2 gnd +12~24v 3 4 +12~24v cn8, cn11: hdd power connector 1x4_2.5mm_straight_male_ wafer (haoguo w7 - 03h104142s1wt) 1 4 pin # signal name 1 +5v 2 ground 3 ground 4 +12v cn10, cn12 : lvds connectors (1st channel, 2nd channel) 2 1 19 20 df13 - 20 signal name pin # pin # signal name tx0 - 2 1 tx0+ ground 4 3 ground tx1 - 6 5 tx1+ + 5v/3.3v 8 7 ground tx3 - 10 9 tx3+ tx2 - 12 11 tx2+ ground 14 13 ground txc - 16 15 txc+ + 5v/3.3v 18 17 enabkl nc 20 19 nc free datasheet http:///
installations mi8 02 user?s manual 17 lvds connectors : 2x10_1.25mm_straight_male_ df13 (hirose df13 - 20dp - 1.25v ) the lvds (24bit) connectors on board consist of the first channel (lvds1) and second channel (lvds2). cn13 : lcd backlight connector 1x4_2.0mm_straight_m( jst b4b - ph - k - s ) 4 1 pin # signal name 1 +3.3v/5v/12v* 2 backlight enable 3 b rightness control 4 ground cn 14,cn16: sata connectors 1 7 4 pin # signal name 1 ground 2 tx+ 3 tx - 4 ground 5 rx - 6 rx+ 7 ground cn17 : usb 6 / 7 ports header 2x4_2.0mm_straight_male_ df1 1 (haoguo df11 - 8s - pa66h, mating connector: hirose df11 - 8ds - 2c or compatible) 1 7 2 8 signal name pin # pin # signal name +5v 1 2 ground data - 3 4 data+ data+ 5 6 data - ground 7 8 +5v cn18: ismart jtag pin header (factory use only) cn20, cn21: mini pcie connector remarks: cn20 usb signal is shared with j5. free datasheet http:///
installations 18 mi8 02 user?s manual cn23 : audio connector (df11 connector) 2x 6 _2.0mm_s traight _male_df11 (haoguo df11 - 12s - pa66h, mating connector: hirose df11 - 12ds - 2c or compatible) 1 12 11 2 signal name pin # pin # signal name lineou t_r 2 1 lineout_l ground 4 3 jd lineout linein r 6 5 linein l ground 8 7 jd_linein m ic_r 10 9 mic_l ground 12 11 jd mic1 cn24 : speaker connector ( jst connector) 1x4_2.5mm_straight_male_ wafer ( e - call 0110- 071- 040, mating connector: jst xhp - 4 or compatible ) 1 4 pin # signal name 1 speaker - l+ 2 speaker - l - 3 speaker - r - 4 speaker - r+ cpu_ fan1: cpu fan power connecto r 3 1 pin # signal name 1 ground 2 +12v 3 rotation detection dimm1, dimm2: ddr3 so - dimm j1: lpc debug conne ctor (factory use only) j 2 : digital i/o 2x5_2.54mm_straight_male_pin header (e - call 0126- 01- 203- 100) 2 8 6 4 5 3 1 7 10 9 signal name pin # pin # signal name gnd 1 2 +5v out3 3 4 out1 out2 5 6 out0 in3 7 8 in1 in2 9 10 in0 free datasheet http:///
installations mi8 02 user?s manual 19 j3: system function connector 2x4_ 2.0mm_ s traight _male_pin header (e - call 0196- 01- 200- 080) 2 8 6 4 1 7 5 3 signal name pin # pin # signal name power btn 1 2 power btn power led+ 3 4 power led - hdd led+ 5 6 hdd led - reset btn 7 8 reset btn j5: usb4 port remarks: s ignal is shared with mini pci e(cn20) 1x5_1.25mm_straight_male_ wafer ( e - call 0110- 26110050, mating connector: molex 51021- 0500 or compatible ) 1 5 pin # signal name 1 ground 2 +5v 3 ground 4 data+ 5 data - j6: spi flash connector (factory use only) pci1: pci slot (supports 2 master) sys_fan1: system fan power connector 3 1 pin # signal name 1 ground 2 +12v 3 rotation detection free datasheet http:///
installations 20 mi8 02 user?s manual this page is intentionally left blank. free datasheet http:///
bios setup mi8 02 user?s manual 21 bios setup this chapter describes the different settings available in the ami bios that co mes with the board . the topics covered in this chapter are as follows: bios introduction ............................................................................. 22 bios setup ....................................................................................... 22 advanced settings ............................................................................. 24 chipset settings ................................................................................. 33 boot settings ..................................................................................... 38 security settings ................................................................................ 39 save & exit settings .......................................................................... 40 free datasheet http:///
bios setup 22 mi8 02 user?s manual bios introduction the bios (basic input/output system) installed in your computer system?s rom supports intel processors. the bios provides critical low - level support for a standard device such as disk drives, serial ports and parallel ports. it also password protection as well as special support for detailed fine - tuning of the chipset controll ing the entire system. bios setup the bios provides a setup utility program for specifying the system configurations and settings. the bios rom of the system stores the setup utility. when you turn on the computer, the bios is immediately activated. press ing the key immediately allows you to enter the setup utility. if you are a little bit late pressing the key, post (power on self test) will continue with its test routines, thus preventing you from invoking the setup. if you still wish to ente r setup, restart the system by pressing the ?reset? button or simultaneously pressing the , and keys. you can also restart by turning the system off and back on again. the following message will appear on the screen: press to enter setup in general, you press the arrow keys to highlight items, to select, the and keys to change entries, for help and to quit. when you enter the setup utility, the main menu screen will appear on the screen. the main menu allows you to select from various setup functions and exit choices. free datasheet http:///
bios setup mi8 02 user?s manual 23 warning: it is strongly recommended that you avoid making any changes to the chipset defaults. these defaults have been carefully chosen by both ami and your system manufact urer to provide the absolute maximum performance and reliability. changing the defaults could cause the system to become unstable and crash in some cases. main advanced chipset boot security save & exit bios information select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit system date sat 07/21/2012 system time 13:03:22 system date set t he date. use tab to switch between data elements. system time set the time. use tab to switch between data elements. free datasheet http:///
bios setup 24 mi8 02 user?s manual advanced settings this section allows you to configure and improve your system and allows you to set up some system features according to your preference. aptio setup utility main advanced chipset boot security save & exit legacy oprom support select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit launch pxe oprom disabled lannch storage oprom disabled ? pci subsystem settings ? acpi settings ? wake up event setting ? cpu configuration ? auto power on schedule ? ide configuration ? usb configuration ? f81866 super io configuration ? fb81866 h/w monitor ? ppm configuration launch pxe oprom enable or disable boot option for legacy network devices. free datasheet http:///
bios setup mi8 02 user?s manual 25 pci subsystem settings aptio setup utility main advanced chipset boot security save & exit pci bus driver version v 2.05.01 select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit pci rom priority legacy rom pci common settings pci latency timer 32 pci bus clocks vga palette snoop disabled perr# generation dis abled serr# generation disabled pci rom priority in case of multiple option roms (legacy and efi compatible), specifies what pci option rom to launch. pci latency timer value to be programmed into pci latency timer register. vga palette snoop en ables or disables vga palette registers snooping. perr# generation enables or disables pci device to generate perr#. serr# generation enables or disables pci device to generate serr#. free datasheet http:///
bios setup 26 mi8 02 user?s manual acpi settings aptio setup utility main advanced chipset bo ot security save & exit acpi settings enable acpi auto configuration disabled enable hibernation enabled enabled acpi auto configuration enables or disables bios acpi auto configuration. enable hibernation enables or disables system ability to hibernate (os/s4 sleep state). this option may be not effective with some os. free datasheet http:///
bios setup mi8 02 user?s manual 27 wake up event setting aptio setup utility main advanced chipset boot security save & exit select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit wake on ring disabled wake on pcie pme disabled wake on ring the options a re disabled and enabled. wake on pcie pme the options are disabled and enabled. free datasheet http:///
bios setup 28 mi8 02 user?s manual cpu configuration this section shows the cpu configuration parameters. aptio setup utility main advanced chipset boot security save & exit cpu configuration select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit processor type intel (r) atom(tm) cpu emt64 not supported processor speed 1865 mhz system bus spee d 533 mhz ratio status 14 actual ratio 14 system bus speed 533 mhz processor stepping 30661 microcode revision 265 l1 cache ram 2x56 k l2 cache ram 2x512 k processor core dual hyper - t hreading supported hyper - t hreading enabled exec ute disable bit enabled limit cpuid maximum disabled hyper - threading enabled for windows xp and linux (os optimized for hyper - threading technology) and disabled for other os (os not optimized for hyper - threading technology). when disabled, only on e thread per enabled core is enabled. execute disable bit xd can prevent certain classes of malicious buffer overflow attacks when combined with a supporting os (windows server 2003 sp1, windows xp sp2, suse linux 9.2, re33dhat enterprise 3 update 3.) li mit cpuid maximum disabled for windows xp. free datasheet http:///
bios setup mi8 02 user?s manual 29 ismart controller aptio setup utility main advanced chipset boot security save & exit auto power on schedule select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit power - on after power failure disable schedule slot 1 none schedule slot 2 none eup/erp sta ndby power control saving the power consumption on power off. power - on after power failure this field sets the system power status whether on or off when power returns to the system from a power failure situation. schedule slot none / power on / power on /off C setup the hour/minute for system power on ide configuration aptio setup utility main advanced chipset boot security save & exit select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit sata port0 not present sata port1 not present sata controller(s) enabled configure sata as id e sata controller(s) enable / disable serial ata controller. configure sata as (1) ide mode. (2) ahci mode. free datasheet http:///
bios setup 30 mi8 02 user?s manual usb configuration aptio setup utility main advanced chipset boot security save & exit usb configuration select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit usb devices: none legacy usb support enabled ehci hand - off enabled usb hardware delays and time - outs: usb transfer time - out 20 sec d e vice re set time - out 20 sec d evice power - up delay auto legacy usb support enables legacy usb support. auto option disables legacy support if no usb devices are connected. disable option will keep usb devices available only for efi applications. ehci han d - off enabled/disabled. this is a workaround for oses without ehci hand - off support. the ehci ownership change should be claimed by ehci driver. usb transfer time - out the time - out value for control, bulk, and interrupt transfers. d e vice reset time - out us b mass storage device start unit command time - out. d evice power - up delay maximum time the device will take before it properly reports itself to the host controller. ? auto ? uses default value: for a root port it is 100ms, for a hub port the delay is taken from hub descr iptor. free datasheet http:///
bios setup mi8 02 user?s manual 31 super io configuration aptio setup utility main advanced chipset boot security save & exit f81866 super io configuration select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit f81866 super io chip f81866 ? serial port 0 configuration ? serial port 1 configuration ? serial port 2 configuration ? serial port 3 configuration ? serial port 4 configuration ? serial port 5 configuration power failure i always off kb/ms power on none f 81866 erp support all enable serial port configuration set parameters of serial ports. user can enable/disable the serial port and select an optimal settings for the super io device. free datasheet http:///
bios setup 32 mi8 02 user?s manual h/w monitor aptio setup utility main advanced chipset boot security save & exit pc health status select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit cpu temperature +52 c system temperature +54 c fan1 speed n/a fan2 speed n/a vcore +1.208 vcc 5v +5.129v vcc12v +11.528 v +1.5v +1.520 v vsb5v +5.040 v vcc3v +3.392 v vsb3v +3.376 v cpu fan1 disabled sys fan1 disabled temperatures/voltages these fields are the parameters of the hardware monitoring function feature of the mo therboard . the values are read - only values as monitored by the system and show the pc health status. cpu fan1 control options are: disabled (default), 50 , 60 , 70 , 80 sys fan2 control options are: disabled (default), 50 , 60 , 70 , 80 ppm configuration aptio setup utility main advanced chipset boot security save & exit ppm configuration select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit eist enabled free datasheet http:///
bios setup mi8 02 user?s manual 33 chipset settings this section allows you to configure and improve your system and allows you to set up some system features a ccording to your preference. aptio setup utility main advanced chipset boot security save & exit select screen select item enter: select +- change field f1: general help f2: previous values f3: optimized default f4: save esc: exit ? host bridge ? south bridge host bridge this item shows the host bridge parameters. south bridge t his item shows the south bridge parameters. host bridge this section allows you to configure the host bridge chipset. aptio setup utility main advanced chipset boot security save & exit select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit ? memory frequency and timing ? intel igd configuration ************memory information************ memory frequency 1067 mhz(ddr3) total memory 2048 mb dimm#0 not present dimm#1 2048 mb free datasheet http:///
bios setup 34 mi8 02 user?s manual memory frequency and timing aptio setup utility main advanced chipset boot security save & exit memory frequency and timing select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit mrc fast boot enabled max tolud dynamic mrc fast boot the options are disabled and enabled. max tolud the default setting is dynamic. intel igd configuration aptio setup utility main advanced chipset boot security save & exit intel igd configuration select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit igfx - boot type vbios default igfx - boot type select the video device which will be a ctivated during post. free datasheet http:///
bios setup mi8 02 user?s manual 35 south bridge this section allows you to configure the south bridge chipset. aptio setup utility main advanced chipset boot security save & exit select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit ? tpt device ? pci express root port0 ? pci express root port1 ? pci express root port2 ? pci express root port3 dmi link aspm control enabled p ci - exp. high priority port disabled high precision event timer configuration high precision timer enabled slp_sp4 assertion width 1 - 2 seconds dmi clink aspm control the control of active state power management on both nb side and sb side of the dmi link. pci - exp. high priority port th e options are disabled, port1, port2, port3, and port4. high precision event timer configuration enable/or disable the high precision event timer. slp_s4 assertion stretch enable select a minimum as sertion width of the slp_s4# signal. free datasheet http:///
bios setup 36 mi8 02 user?s manual tpt device aptio setup utility main advanced chipset boot security save & exit select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit azalia controller hd audio select usb mode by controllers uhci #1 (port 0 and 1) enabled uhci #2 (port 2 and 3) enabled uhci #3 (port 4 and 5) enabled uhci #4 (port 6 and 7) enabled usb 2.0(ehci) support e nabled pci express root port0 aptio setup utility main advanced chipset boot security save & exit select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit pci express port 0 enabled port 0 ioxapic disabled automatic aspm manual aspm l0s root port only aspm l1 enabled pci express root port1 aptio setup utility main advanced chipset boot security save & exit select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit pci express port 1 auto port 0 ioxapic disabled automatic aspm auto free datasheet http:///
bios setup mi8 02 user?s manual 37 pci express root port2 aptio setup utility main advanced chipset boot security save & ex it select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit pci express port 2 auto port 0 ioxapic disabled automatic aspm auto pci express root port3 aptio setup utility main advanced chipset boot security save & exit select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: ex it pci express port 3 enabled port 0 ioxapic disabled automatic aspm auto free datasheet http:///
bios setup 38 mi8 02 user?s manual boot settings aptio setup utility main advanced chipset boot security save & exit boot configuration select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit setup prompt timeout 1 bootup numlock state on quiet boot disabled fast boot disabled csm16 module version 07.6 8 gatea20 active upon request option rom messages force bios interrupt 19 canture enabled csm support enabled boot option priorities setup prompt timeout number of seconds to wait for setup activation key. 65535(0xffff) means inde finite waiting. bootup numlock state select the keyboard numlock state. quiet boot enables/disables quiet boot option. fast boot enables/disables boot with initialization of a minimal set of devices required to launch active boot option. has no effect f or bbs boot options. gatea20 active upon request ? ga20 can be disabled using bios services. always ? do not allow disabling ga20; this option is useful when any rt code is executed above 1mb. option rom messages set display mode for option rom. options: force bios and keep current. interrupt 19 ca p ture enable: allows option roms to trap int 19. csm support enables/disables/auto csm support. free datasheet http:///
bios setup mi8 02 user?s manual 39 security settings this section allows you to configure and improve your system and allows you to set up some sy stem features according to your preference. aptio setup utility main advanced chipset boot security save & exit password description select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit if only the administrator ? s password is set, then this only limits access to setup and is only asked fo r when entering setup. if only the user ? s password is set, then this is a power on password and must be entered to boot or enter setup. in setup the user will have administrator rights administrator password user password administrator pa ssword set setup administrator password. user password set user password. free datasheet http:///
bios setup 40 mi8 02 user?s manual save & exit settings aptio setup utility main advanced chipset boot security save & exit save changes and exit select screen select item enter: select +- change opt f1: general help f2: previous values f3: optimized default f4: save & exit esc: exit discard changes and exit save changes and reset discard changes and reset save options save changes discard changes restore defaults save as user defaults restore user defaults boot override save changes and exit exit system setup after saving the changes. discard changes and exit exit system setup without saving any changes. save changes and reset reset the system after saving the changes. discard changes and reset reset system setup without saving any changes. save changes save changes done so far to any of the setup options. discard changes discard changes done so far to any of the setup options. restore defaults restore/load defaults values for all the setup options. save as user defaults save the changes done so far as user defaults. restore user defaults restore the user defaults to all the setup options. free datasheet http:///
drivers installation mi8 02 user?s manual 41 drivers installation this section describes the installation procedures for software and drivers. the software and drivers are included with the motherboard . if you find the items missing, please contact the vendor where you made the purchase. the conte nts of this section include the following: intel chipset software installation utility ........................................... 42 vga drivers installation ................................................................... 43 realtek hd audio driver installation ................................................ 44 lan driv ers installation .................................................................... 45 important note: after installing your windows operating system, you must install first the intel chipset software installation utility before proceeding with the drivers installation. free datasheet http:///
drivers installation 42 mi8 02 user?s manual intel chipset so ftware installation utility the intel chipset drivers should be installed first before the software drivers to enable plug & play i n f support for intel chipset components. follow the instructions below to complete the installation. 1. insert the disc tha t comes with the board . click intel and then intel(r) cedarview chipset drivers . 2. click intel(r) chipset software installation utility . 3. when the welcome screen to the intel ? chipset device software appears, click next to continue. 4. cl ick yes to accept the software license agreement and proceed with the installation process. 5. on the readme file information screen, click next to continue the installation. 6. the setup process is now complete. click finish to restart the compute r and for changes to take effect. free datasheet http:///
drivers installation mi8 02 user?s manual 43 vga drivers installation 1. click intel(r) cedarview graphics driver . 2. when the welcome screen appears, click next to continue. 4. c lick yes to to agree with the license agreement and continue the installatio n . 5. on the readme file information screen, click next to continue the installation of the intel ? graphics media accelerator driver . 6. on setup progress screen, click next to continue. 7. setup complete. click finish to restart the computer an d for changes to take effect. free datasheet http:///
drivers installation 44 mi8 02 user?s manual realtek hd a udio d river installation 1. click realtek high definition audio driver . 2. on the welcome to the installshield wizard screen, click next to proceed with and complete the installation process. 3. rest art the computer when prompted. free datasheet http:///
drivers installation mi8 02 user?s manual 45 lan drivers installation 1. insert the cd that comes with the board. click lan card and then realtek lan controller drivers . 2. click realtek rtl8111e lan drivers . 3. in the wel come screen, c lick next . 4. in the license agreement screen, c lick i accept the terms in license agreement and next to accept the software license agreement and proceed with the installation process. 5. click the checkbox for drivers in the setup option s screen to select it and click next to continue. 6. when the ready to install the program screen appears, click install to continue. 7. when installshield wizard is complete, click finish . free datasheet http:///
drivers installation 46 mi8 02 user?s manual this page is intentionally left blank. free datasheet http:///
appendix mi8 02 user?s manual 47 appendix a . i/o port address map each peripheral device in the system is assigned a set of i/o port addresses that also becomes the identity of the device. the following table lists the i/o port addresses used. address device description 000h - 01fh dma controll er #1 020h - 03fh interrupt controller #1 040h - 05fh timer 060h - 06fh keyboard controller 070h - 07fh real time clock, nmi 080h - 09fh dma page register 0a0h - 0bfh interrupt controller #2 0c0h - 0dfh dma controller #2 0f0h clear math coprocessor busy signal 0f1h reset math coprocessor 1f0h - 1f7h ide interface 2b0 h - 2df h graphics adapter controller 2e8h - 2efh serial port # 4 (com 4 ) 2f8h - 2ffh serial port #2(com2) 360 h - 36f h network ports 3b0 h - 3bf h monochrome & printer adapter 3c0 h - 3 cf h ega adapter 3d0 h - 3df h cga adapter 3e8h - 3efh serial port # 3 (com 3 ) 3f8h - 3ffh serial port #1(com1) free datasheet http:///
appendix 48 mi8 02 user?s manual b. interrupt request lines (irq) peripheral devices use interrupt request lines to notify cpu for the service required. the following table sh ows the irq used by the devices on board. level function irq0 system timer output irq1 keyboard irq2 interrupt cascade irq3 serial port #2 irq4 serial port #1 irq5 reserved irq6 reserved irq7 reserved irq8 real time clock irq9 reserved irq10 se rial port # 4 irq11 serial port # 3 irq12 ps/2 mouse irq13 80287 irq14 primary ide free datasheet http:///
appendix mi8 02 user?s manual 49 c. watchdog timer configuration the wdt is used to generate a variety of output signals after a user programmable count. the wdt is suitable for use in the preventi on of system lock - up, such as when software becomes trapped in a deadlock. under these sort s of circumstances, the timer will count to zero and the selected outputs will be driven. under normal circumstance, the user will restart the wdt at regular interva ls before the timer counts to zero. sample code: //--------------------------------------------------------------------------- #include #include #include #include #include "f81866.h" //--------------------------------------------------------------------------- int main (int argc, char *argv[]); void enablewdt(int); void disablewdt(void); //--------------------------------------------------------------------------- int main (int argc, char *argv[]) { unsigned char bb uf; unsigned char btime; char **endptr; char sio; printf("fintek 81865 watch dog program \ n"); sio = init_f81866(); if (sio == 0) { printf("can not detect fintek 81865, program abort. \ n"); return(1); }//if (sio == 0) if (argc != 2) { pr intf(" parameter incorrect!! \ n"); return (1); } btime = strtol (argv[1], endptr, 10); printf("system will reset after %d seconds \ n", btime); if (btime) { enablewdt(btime); } else { disablewdt(); } return 0; } //--------------------------------------------------------------------------- void enablewdt(int interval) { unsigned char bbuf; free datasheet http:///
appendix 50 mi8 02 user?s manual bbuf = get_f81866_reg(0x2b); bbuf &= (~0x20); set_f81866_reg(0x2b, bbuf); //enable wdto set_f81866_ld(0x07); //switch to logic device 7 set_f 81866_reg(0x30, 0x01); //enable timer bbuf = get_f81866_reg(0xf5); bbuf &= (~0x0f); bbuf |= 0x52; set_f81866_reg(0xf5, bbuf); //count mode is second set_f81866_reg(0xf6, interval); //set timer bbuf = get_f81866_reg(0xfa); bbuf |= 0x01 ; set_f81866_reg(0xfa, bbuf); //enable wdto output bbuf = get_f81866_reg(0xf5); bbuf |= 0x20; set_f81866_reg(0xf5, bbuf); //start counting } //--------------------------------------------------------------------------- void disablewdt(void) { unsigned char bbuf; set_f81866_ld(0x07); //switch to logic device 7 bbuf = get_f81866_reg(0xfa); bbuf &= ~0x01; set_f81866_reg(0xfa, bbuf); //disable wdto output bbuf = get_f81866_reg(0xf5); bbuf &= ~0x20; bbuf |= 0x40; set_f81866_reg( 0xf5, bbuf); //disable wdt } //--------------------------------------------------------------------------- free datasheet http:///
appendix mi8 02 user?s manual 51 //--------------------------------------------------------------------------- #include "f81866.h" #include //--------------------------------------------------------------------------- unsigned int f81866_base; void unlock_f81866 (void); void lock_f81866 (void); //--------------------------------------------------------------------------- unsigned int init_f81866(void) { unsigned int re sult; unsigned char ucdid; f81866_base = 0x4e; result = f81866_base; ucdid = get_f81866_reg(0x20); if (ucdid == 0x07) //fintek 81865 { goto init_finish; } f81866_base = 0x2e; result = f81866_base; ucdid = get_f81866_reg(0x20); if (ucdid == 0x07) //fintek 81865 { goto init_finish; } f81866_base = 0x00; result = f81866_base; init_finish: return (result); } //--------------------------------------------------------------------------- void unlock_f81866 (void) { outportb(f81866_in dex_port, f81866_unlock); outportb(f81866_index_port, f81866_unlock); } //--------------------------------------------------------------------------- void lock_f81866 (void) { outportb(f81866_index_port, f81866_lock); } //--------------------------------------------------------------------------- void set_f81866_ld( unsigned char ld) { unlock_f81866(); outportb(f81866_index_port, f81866_reg_ld); outportb(f81866_data_port, ld); lock_f81866(); } //--------------------------------------------------------------------------- void set_f81866_reg( unsigned char reg, unsigned char data) { unlock_f81866(); outportb(f81866_index_port, reg); outportb(f81866_data_port, data); lock_f81866(); } //--------------------------------------------------------------------------- unsigned char get_f81866_reg(unsigned char reg) { unsigned char result; unlock_f81866(); outportb(f81866_index_port, reg); result = inportb(f81866_data_port); lock_f81866(); return result; } //--------------------------------------------------------------------------- free datasheet http:///
appendix 52 mi8 02 user?s manual //--------------------------------------------------------------------------- #ifndef __f81866_h #define __f81866_h 1 //--------------------------------------------------------------------------- #define f81866_index_port (f81866_base) #define f81866_data_port (f81866_base+1) //--------------------------------------------------------------------------- #define f81866_reg_ld 0x07 //--------------------------------------------------------------------------- #define f81866 _unlock 0x87 #define f81866_lock 0xaa //--------------------------------------------------------------------------- unsigned int init_f81866(void); void set_f81866_ld( unsigned char); void set_f81866_reg( unsigned char, unsigned char); unsigned char g et_f81866_reg( unsigned char); //--------------------------------------------------------------------------- #endif //__f81866_h free datasheet http:///
appendix mi8 02 user?s manual 53 d. digital i/o sample code files of the main.cpp //--------------------------------------------------------------------------- #include #include #include #include #include "f81866.h" #define bit0 0x01 #define bit1 0x02 #define bit2 0x04 #define bit3 0x08 #define bit4 0x10 #define bit5 0x20 #define bit6 0x40 #define bit7 0x80 //--------------------------------------------------------------------------- int main (void); void dio3initial(void); void dio3setoutput(unsigned char); unsigned char dio3getinput(void); void dio3setdirection(unsigned char); unsigned char dio3getdirection(void); //- -------------------------------------------------------------------------- int main (void) { char sio; unsigned char dio; printf("fintek 81866 digital i/o test program. ver 2.0 \ n"); sio = init_f81866(); if (sio == 0) { printf("can not detect fint ek 81866, program abort. \ n"); return(1); }//if (sio == 0) dio3initial(); /* //for gpio30..37 dio3setdirection(0xf0); //gp30..33 = input, gp34..37=output printf("current dio direction = 0x%x \ n", dio3getdirection()); printf("current dio status = 0x %x \ n", dio3getinput()); printf("set dio output to high \ n"); dio3setoutput(0x0f); printf("set dio output to low \ n"); dio3setoutput(0x00); */ //for gpio30..37 dio3setdirection(0xf0); //gp30..33 = input, gp34..37=output dio3setoutput(0x00); //cle ar // dio = dio3getinput() & 0x0f; free datasheet http:///
appendix 54 mi8 02 user?s manual dio3setoutput(0x00); //clear dio = dio3getinput() & 0x0f; if (dio != 0x0a) { printf("the fintek 81866 digital io abnormal, abort. \ n"); return(1); }//if (dio != 0x0a) dio3setoutput(0xa0); //clr# is high dio3setoutput(0xf0); //clk and clr# is high dio3setoutput(0xa0); //clr# is high dio = dio3getinput() & 0x0f; if (dio != 0x05) { printf("the fintek 81866 digital io abnormal, abort. \ n"); return(1); } printf("!!! pass !!! \ n"); return 0; } //--------------------------------------------------------------------------- void dio3initial(void) { unsigned char ucbuf; // switch gpio multi - function pin for gpio 30~37 // multi pin select uart2/gpios // bit[6:5] 0:uart2 / 1:gpios ucbuf = get_f818 66_reg(0x28); ucbuf |= bit5; set_f81866_reg(0x28, ucbuf); set_f81866_ld(0x06); //switch to logic device 6 //enable the gp3 group ucbuf = get_f81866_reg(0x30); ucbuf |= 0x01; set_f81866_reg(0x30, ucbuf); set_f81866_reg(0x88, 0x00); //define as input mode //set_f81866_reg(0xa3, 0xff); //push pull mode } //--------------------------------------------------------------------------- void dio3setoutput(unsigned char newdata) { set_f81866_ld(0x06); //switch to logic device 6 set_f81866_reg(0x89, newdata); } //--------------------------------------------------------------------------- unsigned char dio3getinput(void) { unsigned char result; set_f81866_ld(0x06); //switch to logic device 6 result = get_f81866_reg(0x8a ); return (result); } free datasheet http:///
appendix mi8 02 user?s manual 55 //--------------------------------------------------------------------------- void dio3setdirection(unsigned char newdata) { //newdata : 1 for input, 0 for output set_f81866_ld(0x06); //switch to logic device 6 set_f81866 _reg(0x88, newdata); } //--------------------------------------------------------------------------- unsigned char dio3getdirection(void) { unsigned char result; set_f81866_ld(0x06); //switch to logic device 6 result = get_f81866_reg(0x88); retu rn (result); } //--------------------------------------------------------------------------- free datasheet http:///
appendix 56 mi8 02 user?s manual files of the f81866.cpp //--------------------------------------------------------------------------- #include "f81866.h" #include //--------------------------------------------------------------------------- unsigned int f81866_base; void unlock_f81866 (void); void lock_f81866 (void); //--------------------------------------------------------------------------- unsigned int init_f81866(void) { unsigned int result; unsigned char ucdid; f81866_base = 0x4e; result = f81866_base; ucdid = get_f81866_reg(0x20); if (ucdid == 0x10) //fintek 81801 { goto init_finish; } f81866_base = 0x2e; result = f81866_base; ucdid = get_f81866_reg( 0x20); if (ucdid == 0x07) //fintek 81801 { goto init_finish; } f81866_base = 0x00; result = f81866_base; init_finish: return (result); } //--------------------------------------------------------------------------- void unlock_f81866 (void) { outportb(f81866_index_port, f81866_unlock); outportb(f81866_index_port, f81866_unlock); } //--------------------------------------------------------------------------- void lock_f81866 (void) { outportb(f81866_index_port, f81866_lock); } //--------------------------------------------------------------------------- void set_f81866_ld( unsigned char ld) { unlock_f81866(); outportb(f81866_index_port, f81866_reg_ld); outportb(f81866_data_port, ld); lock_f81866(); } //--------------------------------------------------------------------------- void set_f81866_reg( unsigned char reg, unsigned char data) { unlock_f81866(); outportb(f81866_index_port, reg); outportb(f81866_data_port, data); lock_f81866(); free datasheet http:///
appendix mi8 02 user?s manual 57 } //--------------------------------------------------------------------------- unsigned char get_f81866_reg(unsigned char reg) { unsigned char result; unlock_f81866(); outportb(f81866_index_port, reg); result = inportb(f81866_data_port); lock_f81866(); return result; } //--------------------------------------------------------------------------- free datasheet http:///
appendix 58 mi8 02 user?s manual files of the f81866.h //--------------------------------------------------------------------------- #ifndef __f81866_h #define __f81866_h 1 //--------------------------------------------------------------------------- #define f81866_index_port (f81866_base) #define f81866_data_port (f81866_base+1) //--------------------------------------------------------------------------- #define f81866_reg_ld 0x07 //--------------------------------------------------------------------------- #define f81866_unlock 0x87 #define f81866_lock 0xaa //--------------------------------------------------------------------------- unsigned int init_f81866(void); void set_f81866_ld( unsigned char); void set_f81866_reg( unsigned char, unsigned char); unsigned char get_f81866_reg( unsigned char); //--------------------------------------------------------------------------- #endif //__f81866_h free datasheet http:///


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